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M74HC139RM13TR,M74HC139B1R,M74HC139TTR, 规格书,Datasheet 资料

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M74HC139

DUAL 2 TO 4 DECODER/DEMULTIPLEXER

s

s

s

s

s

s

s

HIGH SPEED:

tPD = 13ns (TYP.) at VCC = 6VLOW POWER DISSIPATION:ICC = 4µA(MAX.) at TA=25°CHIGH NOISE IMMUNITY:

VNIH = VNIL = 28 % VCC (MIN.)

SYMMETRICAL OUTPUT IMPEDANCE:|IOH| = IOL = 4mA (MIN)

BALANCED PROPAGATION DELAYS:tPLH ≅ tPHL

WIDE OPERATING VOLTAGE RANGE:VCC (OPR) = 2V to 6V

PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 139

DIPSOPTSSOPORDER CODES

PACKAGEDIPSOPTSSOP

TUBEM74HC139B1RM74HC139M1R

T & R

M74HC139RM13TRM74HC139TTR

DESCRIPTION

The M74HC139 is an high speed CMOS QUAD2-INPUT NAND GATE fabricated with silicon gateC2MOS technology.

The active low enable input can be used for gatingor as a data input for demultiplexing applications.

While the enable input is held high, all four outputsare high independently of the other inputs.

All inputs are equipped with protection circuitsagainst static discharge and transient excessvoltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 20011/9

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M74HC139

INPUT AND OUTPUT EQUIVALENT CIRCUIT

PIN DESCRIPTION

PIN No1, 152, 34, 5, 6, 712, 11, 10, 914, 13 816

SYMBOL

NAME AND FUNCTION

1G, 2GEnable Inputs1A, 1BAddress Inputs1Y0 TO 1Y3Outputs2Y0 TO 2Y3Outputs2A, 2BGNDVCC

Address Inputs Ground (0V)

Positive Supply Voltage

TRUTH TABLE

INPUTSENABLESELECT

GHLLLL

BXLLHH

AXLHLH

Y0HLHHH

OUTPUTSY1HHLHH

Y2HHHLH

Y3HHHHL

SELECTED OUTPUTNONEY0Y1Y2Y3

LOGIC DIAGRAM

This logic diagram has not be used to estimate propagation delays2/9

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M74HC139

ABSOLUTE MAXIMUM RATINGS

SymbolVCCVIVOIIKIOKIOPDTstgTL

Supply VoltageDC Input VoltageDC Output VoltageDC Input Diode CurrentDC Output Diode CurrentDC Output CurrentPower DissipationStorage TemperatureLead Temperature (10 sec)

Parameter

Value-0.5 to +7-0.5 to VCC + 0.5-0.5 to VCC + 0.5

± 20± 20± 25± 50500(*)-65 to +150

300

UnitVVVmAmAmAmAmW°C°C

ICC or IGNDDC VCC or Ground Current

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied

(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C

RECOMMENDED OPERATING CONDITIONS

SymbolVCCVIVOToptr, tf

Supply VoltageInput VoltageOutput VoltageOperating TemperatureInput Rise and Fall Time

VCC = 2.0VVCC = 4.5VVCC = 6.0V

Parameter

Value2 to 60 to VCC0 to VCC-55 to 1250 to 10000 to 5000 to 400

UnitVVV°Cnsnsns

3/9

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M74HC139

DC SPECIFICATIONS

Test Condition

Symbol

Parameter

VCC(V)2.04.56.02.04.56.02.04.56.04.56.0

VOL

Low Level Output Voltage

2.04.56.04.56.0

IIICC

Input Leakage Current

Quiescent Supply Current

6.06.0

IO=-20 µAIO=-20 µAIO=-20 µAIO=-4.0 mAIO=-5.2 mAIO=20 µAIO=20 µAIO=20 µAIO=4.0 mAIO=5.2 mAVI = VCC or GNDVI = VCC or GND

TA = 25°CMin.1.53.154.2

0.51.351.8

1.94.45.94.185.68

2.04.56.04.315.80.00.00.00.170.18

0.10.10.10.260.26± 0.14

1.94.45.94.135.63

0.10.10.10.330.33± 140

Typ.

Max.

Value-40 to 85°CMin.1.53.154.2

0.51.351.8

1.94.45.94.105.60

0.10.10.10.400.40± 180

µAµAVV

Max.

-55 to 125°CMin.1.53.154.2

0.51.351.8Max.

VUnit

VIH

High Level Input Voltage

Low Level Input Voltage

High Level Output Voltage

VIL

V

VOH

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)

Test Condition

Symbol

Parameter

VCC(V)2.04.56.02.04.56.02.04.56.0

TA = 25°CMin.

Typ.3087451513391311

Max.75151313026221102219

Value-40 to 85°CMin.

Max.95191616533281402824

-55 to 125°CMin.

Max.110221919539331653328

nsUnit

tTLH tTHLOutput Transition

TimetPLH tPHLPropagation Delay

Time (A, B -Y)tPLH tPHLPropagation Delay

Time (G -Y)

ns

ns

4/9

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M74HC139

CAPACITIVE CHARACTERISTICS

Test Condition

Symbol

Parameter

VCC(V)5.05.0

TA = 25°CMin.

Typ.546

Max.10

Value-40 to 85°CMin.

Max.10

-55 to 125°CMin.

Max.10

pFpFUnit

CINCPD

Input CapacitancePower Dissipation Capacitance (note 1)

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2(per circuit)

TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)RT = ZOUT of pulse generator (typically 50Ω)

WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle)

5/9芯天下--http://oneic.com/

M74HC139Plastic DIP-16 (0.25) MECHANICAL DATAmm.DIM.MIN.a1Bbb1DEee3FILZ3.31.278.52.5417.787.15.10.1300.0500.510.770.50.25200.3350.1000.7000.2800.2011.65TYPMAX.MIN.0.0200.0300.0200.0100.7870.065TYP.MAX.inchP001C6/9芯天下--http://oneic.com/

M74HC139SO-16 MECHANICAL DATADIM.Aa1a2bb1Cc1DEee3FGLMS3.84.60.50.350.190.545° (typ.) 9.8100.3855.81.278.4.05.31.270.628°(max.)0.1490.1810.0196.20.2280.0500.3500.1570.2080.0500.0240.1mm.MIN.TYPMAX.1.750.21.650.460.250.0130.0070.0190.003MIN.inchTYP.MAX.0.0680.0070.00.0180.0100.3930.244PO13H7/9芯天下--http://oneic.com/

M74HC139TSSOP16 MECHANICAL DATAmm.DIM.MIN.AA1A2bcDEE1eKL0°0.450.600.050.80.190.094.96.24.356.44.40.65 BSC8°0.750°0.0180.0241TYPMAX.1.20.151.050.300.205.16..480.0020.0310.0070.0040.1930.2440.1690.1970.2520.1730.0256 BSC8°0.0300.0040.039MIN.TYP.MAX.0.0470.0060.0410.0120.000.2010.2600.176inchAA2A1beKcLEDE1PIN 1 IDENTIFICATION10080338D8/9芯天下--http://oneic.com/

M74HC139

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for theconsequences of use of such information nor for any infringement of patents or other rights of third parties which may result fromits use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationsmentioned in this publication are subject to change without notice. This publication supersedes and replaces all informationpreviously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices orsystems without express written approval of STMicroelectronics.

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