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专利名称：Scheme for improving the simulation
accuracy of integrated circuit patterns bysimulation of the mask
发明人：Artur E. Balasinski,Dianna L. Coburn,Keeho E.
Kim,Dongsung Hong
申请号：US09608158申请日：20000630公开号：US06834262B1公开日：20041221
专利附图：
摘要：A mask simulation process is introduced into a conventional OPC procedure,
prior to simulation of a photoresist pattern. Reticle simulation may be achieved usingvery short wavelengths of light as compared to the mask feature size. Alternatively,reticle simulation may be made through adjustments in a computer aided design process.
申请人：CYPRESS SEMICONDUCTOR CORPORATION
代理机构：Evan Law Group LLC
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